TY - JOUR
T1 - Design guidelines for superjunction devices in the presence of charge imbalance
AU - Alam, Monzurul
AU - Morisette, Dallas T.
AU - Cooper, James A.
PY - 2018/8/1
Y1 - 2018/8/1
N2 - Performance limitations of superjunction (SJ) devices due to charge imbalance (CI) are analyzed in this paper. It is demonstrated that in the presence of CI, the specific on-resistance has a quadratic dependence on blocking voltage, similar to a conventional drift region. We also show that by designing the SJ structure with an optimally modified pillar doping, we can achieve better performance under conditions of CI. The design guidelines presented in this paper are applicable to any semiconductor, although all calculations are based on silicon carbide.
AB - Performance limitations of superjunction (SJ) devices due to charge imbalance (CI) are analyzed in this paper. It is demonstrated that in the presence of CI, the specific on-resistance has a quadratic dependence on blocking voltage, similar to a conventional drift region. We also show that by designing the SJ structure with an optimally modified pillar doping, we can achieve better performance under conditions of CI. The design guidelines presented in this paper are applicable to any semiconductor, although all calculations are based on silicon carbide.
KW - Charge imbalance (CI)
KW - optimization
KW - superjunction (SJ)
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U2 - 10.1109/TED.2018.2848584
DO - 10.1109/TED.2018.2848584
M3 - Article
SN - 0018-9383
VL - 65
SP - 3345
EP - 3351
JO - IEEE Transactions on Electron Devices
JF - IEEE Transactions on Electron Devices
IS - 8
M1 - 8402235
ER -