Impact of logic synthesis on soft error rate of digital integrated circuits

Daniel B. Limbrick

doi:10.1109/isvlsi.2012.67

Impact of logic synthesis on soft error rate of digital integrated circuits

Daniel B. Limbrick

Electrical and Computer Engineering

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Reliability-aware synthesis exploits the properties of fault masking to improve the reliability of logic circuits. My dissertation investigates how synthesis constraints can impact the effectiveness of this technique. © 2012 IEEE.

Original language	English
Title of host publication	2012 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2012
DOIs	https://doi.org/10.1109/isvlsi.2012.67
State	Published - 2012

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title = "Impact of logic synthesis on soft error rate of digital integrated circuits",

abstract = "Reliability-aware synthesis exploits the properties of fault masking to improve the reliability of logic circuits. My dissertation investigates how synthesis constraints can impact the effectiveness of this technique. {\textcopyright} 2012 IEEE.",

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year = "2012",

doi = "10.1109/isvlsi.2012.67",

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AB - Reliability-aware synthesis exploits the properties of fault masking to improve the reliability of logic circuits. My dissertation investigates how synthesis constraints can impact the effectiveness of this technique. © 2012 IEEE.

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M3 - Conference contribution

BT - 2012 IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2012

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Impact of logic synthesis on soft error rate of digital integrated circuits

Abstract

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