Abstract
In this paper, we describe a new method to generate lumped-parameter equivalent-circuit (EC) approximations for on-chip inductors. Nonlinear least-squares fitting is then applied to numerical data obtained from a very large number of single-time ASITIC runs for a given process. Results show significant improvement as compared to the published models. The proposed method should enable the optimization of inductor geometry.
| Original language | English |
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| Title of host publication | IEEE SoutheastCon 2010 (SoutheastCon), Proceedings of the |
| Pages | 514–517 |
| State | Published - 2010 |